• It has 2 regions at each edge of MOSFET called source and Drain.
• A terminal called Gate exist in between the source and drain.
• pn Junction is formed between source/drain and substrate n/p type materials.
  

What is Short Channel ?

• Short channel is the depletion channel length between the source and drain,
  
• therefore, a MOSFET device is considered to be short when channel length is the same order of magnitude as the depletion-layer widths (XdD, XdS) of the source and drain junction.
  
• As the channel length L is reduced. then it is so called short-channel length arise.
• However.. it has pros and cons

PROS and CONS (short channel effect)

pros :

It leads MOSFET has a good processing speed, requires low operating potential and increases transistor density on the chip.

cons :

It faces som serious issues like Drain induced barrier lowering and punchthrough(DIBL), Surface Scattring, Velocity saturation, impact ionization, hot electron effect.

Drain Induced Barrier Lowering(DIBL)

• The source and drain depletion regions can intrude into the channel even without bias, as these junctions are brought closer together in short channel devices.
• This effect is called charge sharing since the source and drain in effect take part of the channel charge, which would otherwise be controlled by the gate.
• As the drain depletion region continues to increase with the bias, it actually interact with the source junction and hence lowers the potential barrier.
  When the source junction barrier is reduced, electrons are easily injected into the channel and the gat voltage has no longer any control over the drain current.
  

Surface Scattering

• When th carriers travel along the channel they are attracted to the surface by the elctric field creatd by the gate voltage.
• As a result, they keep crashing and bouncing against the surface, during their travel, following a zig-zagging path.
  
• This effectively reduces the surface mobility of the carriers. In comparison with their bul mobility. the change in carrier mobility impacts the current- voltage relationship of the transistor.
• As the electron travels through the channel. It is attracted to the silicon to silicon dioxide interface and bounce against it. this effect reduces its mobility.

Velocity Saturation

• The performance of short channel devices is also affcted by the velocity saturation, which reduces the transconductance in saturation mode.
• At low ey, the value of drift velocity VDE is varies linearity with the elctric field intensity.
• This is because the value of ey increases will cause the drift velocity tends to increase more slowly, and approaches a saturation value.
• The drain current is limited by velocity saturation instead of pitch off. this occurs i short cannel devices when the dimnsions are scaled without lowering the bias voltags.
  

Impact Ionization

• When an electron collides with an atom of the silicon lattice structure, the energy passed to the atom upon collision can knock out an electron out of the valence band to the conduction band, creating an electron-hole pair.
• The hole is attracted to the bulk while the generated electron moves on to the drain.
  
• An undesirable short channel effect, especially in NMOS. Occurs due to the high velocity of electrons.
• In the prresense of high longitudical fields, it can generate electron-hole(e-h) pairs by impact ionization that is by impacting on silicon atoms and ionizing them.

Hot Electrons/Carrier Injection

• Hot electron effect is the transport of the energetic electrons over (or tunneling through) the barrier into the oxide.
• Such the electrons become trapped in the oxide layer, where they change the threshold voltage and V-I characteristics of the device.
• This give rise to oxide charging that can accumulate with time and degrade the device performance by increasing VT and affect adversely the gate's control on the drain current.
  

This can be reduced by a few ways as below

• using high intensity light during masking
• by optical proximity correction
• Thinning gate oxide and using shallow source or drain junctions.
• By making a novel self-aligned double-gate MOSFETs.